1. Field of the Invention
The present invention relates to an automatic gain controller for compensating for an amplitude variation of a received signal in a radio communication system and more particularly relates to an automatic gain controller for reducing a code size of a digital signal processor (DSP).
2. Description of the Related Art
Radio communication systems often suffer from a fading phenomenon which causes an amplitude variation in a received signal. To compensate for the amplitude variation, radio communication systems often utilize an automatic gain controller (AGC). AGC circuits provide a substantially constant output amplitude in response to a varying input signal amplitude.
FIG. 1 illustrates a block diagram of a conventional automatic gain controller. Referring to the drawing, an automatic gain control (AGC) amplifier 11 amplifies an input signal according to an AGC control signal. An analog-to-digital (A/D) converter 12 converts an analog signal output from the AGC amplifier 11 to a digital signal. A power estimator 13 estimates a power of a signal output from the A/D converter 12. An AGC controller 14 receives an AGC reference value and the power estimated in the power estimator 13 to calculate an AGC gain. The power estimator 13 converts the calculated AGC gain to a digital dB (decibel) value. A digital-to-analog (D/A) converter 15 converts the digital dB value output from the AGC controller 14 to the analog AGC control signal and provides the AGC control signal to the AGC amplifier 11.
Conventionally, the AGC controller 14 is a complex structure, since it must calculate the AGC reference value and the estimation value of the power estimator 13 in real time. With advances in digital signal processor (DSP) chips, there is an increasing tendency to utilize a DSP chip as a processor for the communications system and have the DSP perform the function of the automatic gain controller. However, utilizing the DSP as the AGC controller 14 places a significant calculation burden on the DSP, which may result in an overload on the DSP chip. In addition, to incorporate additional functions into the DSP chip, it is necessary to reduce the DPS code in size (or length) for respective software modules.